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VHDL Reference Guide
Chapter 5: Sequential Statements

loop Statements

A loop statement repeatedly executes a sequence of statements. The syntax follows.

[label :] [iteration_scheme] loop
{ sequential_statement }
{ next [ label ] [ when condition ] ; }
{ exit [ label ] [ when condition ] ; }
end loop [label];

The next and exit statements are sequential statements used only within loops.

Basic loop Statement

The basic loop statement has no iteration scheme. Foundation Express executes enclosed statements repeatedly until it encounters an exit or next statement. The syntax statement follows.

[label :] loop
   { sequential_statement }
end loop [label];

See the “next Statements” section and “exit Statements” section of this chapter.

Note: Noncomputable loops (loop and while...loop statements) must have at least one wait statement in each enclosed logic branch. Otherwise, a combinatorial feedback loop is created. See the “wait Statements” section of this chapter for more information. Conversely, computable loops (for...loop statements) must not contain wait statements. Otherwise, a race condition may result.

while...loop Statements

The while...loop statement has a Boolean iteration scheme. If the iteration condition evaluates true, Foundation Express executes the enclosed statements once. The iteration condition is then reevaluated. As long as the iteration condition remains TRUE, the loop is repeatedly executed. When the iteration condition evaluates FALSE, the loop is skipped and execution continues with the next loop iteration. The syntax for a while...loop statement follows.

[label :] while condition loop
{ sequential_statement }
end loop [label];

See the “next Statements” section and the “exit Statements” section of this chapter.

Note: Noncomputable loops (loop and while...loop statements) must have at least one wait statement in each enclosed logic branch. Otherwise, a combinatorial feedback loop is created. See the “wait Statements” section of this chapter for more information.

for...loop Statements

The for...loop statement has an integer iteration scheme. The integer range determines the number of repetitions The syntax for a for...loop statement follows.

[label :] for identifier in range loop
{ sequential_statement }
end loop [label];

See the “next Statements” section and “exit Statements” section of this chapter.

Note: Computable loops (for...loop statements) must not contain wait statements. Otherwise, a race condition may result.

Steps in the Execution of a for...loop Statement

A for...loop statement executes as follows.

  1. A new integer variable, which is local to the loop, is declared with the name identifier.

  2. The identifier receives the first value of range, and the sequence of statements executes once.

  3. The identifier receives the next value of range, and the sequence of statements executes once more.

  4. Step 3 is repeated until identifier receives the last value in range. The sequence of statements then executes for the last time. Execution continues with the statement following the end loop. The loop is then inaccessible.

The following example shows two equivalent code fragments. The resulting circuit design is shown in the figure following the example.

variable A, B: BIT_VECTOR(1 to 3);

-- First fragment is a loop statement
for I in 1 to 3 loop
A(I) <= B(I);
end loop;

-- Second fragment is three statements
A(1) <= B(1);
A(2) <= B(2);
A(3) <= B(3);

Figure 5.5 Circuit for for...loop Statement with Equivalent Fragments

for...loop Statements and Arrays

You can use a loop statement to operate on all elements of an array without explicitly depending on the size of the array. The following example shows how to use the VHDL array attribute 'range to invert each element of bit vector A. A figure of the resulting circuit follows the example. Unconstrained arrays and array attributes are described in “Array Types” section of the “Data Types” chapter.

entity example5_13 is
   port(
      A: out BIT_VECTOR(1 to 10);
      B: in BIT_VECTOR(1 to 10)
      );
end example5_13;

architecture behave of example5_13 is
begin
   process (B)
begin

for I in A'range loop
   A(I) := not B(I);
end loop;

end process;
end behave;

Figure 5.6 Circuit for for...loop Statement Operating on an Entire Array