Concept

Concept is a Cadence schematic entry tool. You can capture designs for implementation in the Spartan/XL, XC3000A/L, XC3100A/L, XC4000E/L, XC4000EX/XL/XV, XC5200, and XC9500/XL Xilinx architectures.

The Concept libraries include the following.

• Libraries for designing Xilinx FPGAs and CPLDs named xcexxxx
  
  
• LogiBLOX modules, generated by the LogiBLOX GUI (lbgui) standalone command for use with Concept, include Verilog and NGO files. Use the Verilog modules generated by lbgui as the input to the Concept genview command to create body files. Use the NGO files created by the lbgui command to implement the LogiBLOX module in your design.
  
  
• VAN-analyzed Verilog libraries for Concept HDL Direct Verilog netlist generation support
  
  

For a complete description of how to use Concept, see the Concept Schematic User Guide. Also see the Concept Getting Started Tutorial.

The following illustration shows the schematic entry flow using Concept with the Xilinx-supplied Concept Unified Schematic Libraries.

Figure 3.1 Schematic Entry Design Flow