You can download an implemented FPGA design directly from your PC using the Hardware Debugger program with either the XChecker cable or the JTAG download cable. The XChecker cable is not shipped with the standard Foundation product. The JTAG Programmer with flying FPGA leads is shipped with the new customer packages. Supported FPGA families for JTAG include the XC4000E/L/EX/XL/XV/XLA, XC5200, and Spartan/XL.
The Hardware Debugger can download a BIT file or a PROM file: MCS, EXO, or TEK file formats. A BIT file contains configuration information for an FPGA device.
You can download an implemented CPLD design from your PC using the JTAG Programmer. See the JTAG Programmer Guide for details. Also see the Hardware User Guide.
For more information on using either the Hardware Debugger or the XChecker cable, see the Hardware Debugger Reference/User Guide and the “In-Depth Tutorial - Hardware Verification” chapter in this manual, the Quick Start Guide.
To download an implemented design, click the Programming icon in the Project Flow area.
An FPGA or daisy chain of FPGAs can be configured from serial or parallel PROMs. The PROM File Formatter can create MCS, EXO, or TEK style files. The files are read by a PROM programmer that turns the image into a PROM.
A HEX file can also be used to configure an FPGA or a daisychain of FPGAs through a microprocessor. The file is stored as a data structure in the microprocessor boot-up code.
Once a design has been downloaded to an FPGA, snapshots of internal signal states can be captured and read using the Hardware Debugger program and the XChecker cable. You can display the signal states as waveforms in the Hardware Debugger.
This capability allows you to test and debug your design in a real-time environment as it interfaces with the other components on your board. You can also control the states of your state machines by controlling when clock edges are sent to your system clock input.
For more information on in-circuit debugging, the Hardware Debugger, or the XChecker cable, see the Hardware Debugger Reference/User Guide.
