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Foundation Express Compiler Directives

The three types of compiler directives follow.

         -- pragma map_to_entity entity_name
         -- pragma return_port_name port_name

Translation Stop and Start Directives

Translation compiler directives stop and start the translation of a VHDL source file by Foundation Express.

   -- pragma translate_off 
   -- pragma translate_on

The translate_off and translate_on compiler directives instruct Foundation Express to stop and start parsing VHDL source code. The VHDL code between these two compiler directives is completely ignored regardless of syntax.

Translation is enabled at the beginning of each VHDL source file. You can use translate_off and translate_on compiler directives anywhere in the text.

The synthesis_off and synthesis_on compiler directives are the recommended mechanisms for hiding simulation-only constructs from synthesis. Any text between these compiler directives is checked for syntax, but no corresponding hardware is synthesized.

The example below shows how you can use the compiler directives to protect a simulation driver.

   -- The following test driver for entity EXAMPLE
   --   should not be translated:
   --
   -- pragma synthesis_off
   --   Translation stops
   
   entity DRIVER is
   end;
   
   architecture VHDL of DRIVER is
          signal A, B : INTEGER range 0 to 255;
         signal SUM  : INTEGER range 0 to 511;
   
          component EXAMPLE 
         port (A, B: in INTEGER range 0 to 255;
            SUM: out INTEGER range 0 to 511);
      end component;
   
   begin
             U1: EXAMPLE port map(A, B, SUM);
      process
      begin
         for I in 0 to 255 loop
            for J in 0 to 255 loop
               A <= I;
               B <= J;
               wait for 10 ns;
               assert SUM = A + B;
            end loop;
         end loop;
      end process;
   end;
   
   -- pragma synthesis_on
   --   Code from here on is translated
   
   entity EXAMPLE is
      port (A, B: in INTEGER range 0 to 255;
         SUM: out INTEGER range 0 to 511);
   end;
   
   architecture VHDL of EXAMPLE is
   begin
      SUM <= A + B;
   end;

Resolution Function Directives

Resolution function compiler directives determine the resolution function associated with resolved signals. (See the “Signal Declarations” section of the “Describing Designs” chapter.) Foundation Express does not currently support arbitrary resolution functions. It does support the following three methods.

   -- pragma resolution_method wired_and 
   -- pragma resolution_method wired_or 
   -- pragma resolution_method three_state

NOTE

Do not connect signals that use different resolution functions. Foundation Express supports only one resolution function per network.

Component Implication Directives

Component implication directives map VHDL subprograms onto existing components or VHDL entities. These directives are described under the “Mapping Subprograms to Components (Entities)” section of the “Sequential Statements” chapter.

   -- pragma map_to_entity entity_name
   -- pragma return_port_name port_name
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