Examples of Pin-to-pin and Detailed Descriptions

Two equivalent module descriptions, one pin-to-pin and one detailed, are shown below for comparison:

Pin-to-pin Module Description

module Q1_1
Q1 pin istype 'reg';
Clock,Preset pin;

equations
Q1.clk = Clock;
Q1 := !Q1.fb # Preset;

test_vectors ([Clock,Preset] -> Q1)
[ .c. , 1 ] -> 1;
[ .c. , 0 ] -> 0;
[ .c. , 0 ] -> 1;
[ .c. , 0 ] -> 0;
[ .c. , 1 ] -> 1;
[ .c. , 1 ] -> 1;
end

Detailed Module Description

module Q1_2
Q1 pin istype 'reg_D,buffer';
Clock,Preset pin;

equations
Q1.CLK = Clock;
Q1.D = !Q1.Q # Preset;

test_vectors ([Clock,Preset] -> Q1)
[ .c. , 1 ] -> 1;
[ .c. , 0 ] -> 0;
[ .c. , 0 ] -> 1;
[ .c. , 0 ] -> 0;
[ .c. , 1 ] -> 1;
[ .c. , 1 ] -> 1;
end

The first description can be targeted into virtually any device (if register synthesis and device fitting features are available) while the second one can be targeted only to devices featuring D-type flip-flops and non-inverting outputs.

To implement the second (detailed) module into a device with inverting outputs, the source file would need to be modified as described in Detailed Module with Inverted Outputs :