Chapter 3

Controlling Design Implementation

This chapter discusses the techniques for controlling how various parts of your design get implemented into a CPLD device. It concentrates mainly on the attributes you place in your schematic and the options you select in the Design Manager.

This chapter contains the following sections:

• “Target Device Selection” section
  
  
• “Controlling Preload Values” section
  
  
• “Controlling Power Consumption” section
  
  
• “Controlling Output Slew Rate” section
  
  
• “Controlling the Pinout” section
  
  
• “Controlling Logic Optimization” section
  
  
• “Controlling Timing Paths” section