Appendix E

Viewlogic Interface Notes

This appendix provides information on setting up the Viewlogic interface and project libraries. Included are examples for assigning location constraints and timing specifications. The following sections are included in this chapter.

Documentation

The following documentation is available for the Viewlogic interface.

Viewlogic Interface/Tutorial Guide is available on-line and viewable with the DynaText browser.
Xilinx Release Document describes installation setup and current issues regarding the use of the Viewlogic interface, and is available on the supplied CD-ROM.

Setting Up Viewlogic Interface on Workstations

In addition to the environment variables described in the “Installing the Software” chapter, the following environment variables must be modified or added to run the Viewlogic tools.

POWERVIEW (add)
WDIR (add)
VANTAGE_VSS (add)
PATH (modify)
LM_LICENSE_FILE (modify)
LD_LIBRARY_PATH (modify, Solaris only)
SHLIB_PATH (modify, HP-UX only)

In addition to the variables set for the Xilinx implementation tools, these variables should be set as follows.

setenv POWERVIEW <installation_path_to_viewlogic>

setenv WDIR $XILINX/viewlog/data/logiblox/standard:$POWERVIEW/standard

setenv VANTAGE_VSS $POWERVIEW/standard/van_vss

set path = ($POWERVIEW \

             $VANTAGE_VSS/pgm/dir   \

             $path)

setenv LM_LICENSE_FILE <path_to_viewlogic_license_file>:$LM_LICENSE_FILE

For Solaris only.

setenv LD_LIBRARY_PATH $POWERVIEW/standard/fusion:$LD_LIBRARY_PATH

For HP/UX only.

setenv SHLIB_PATH $POWERVIEW/standard/fusion:$SHLIB_PATH

NOTE

The previous settings assume that the XILINX, LD_LIBRARY_PATH, SHLIB_PATH, and LM_LICENSE_FILE environment variables have been previously assigned to point to the appropriate areas. The POWERVIEW variable is not required by Xilinx or by the Viewlogic software. It is used to simplify these environment variable settings.

Setting Up Viewlogic Interface on the PC

In addition to the environment variables described in the “Installing the Software” chapter, the following environment variables must be modified or added to run the Viewlogic interface tools on a PC.

PATH(modify)
WDIR (new)
VANTAGE_VSS (new)
VANTAGE_CC (new)
LM_LICENSE_FILE (modify)

These variables are modified/added in the following manner by the Workview Office installation software. The following examples assume that all the software has been installed to the default locations on the C:\ drive. If these default paths have been changed, the environment settings must change accordingly.

PATH=C:\WVOFFICE;%PATH%

SET WDIR=C:\WVOFFICE\STANDARD

SET VANTAGE_VSS=C:\WVOFFICE\V

SET VANTAGE_CC=C:\WVOFFICE\CL

SET LM_LICENSE_FILE=C:\WVOFFICE\STANDARD\LICENSE.DAT,; C:XILINX\DATA\LICENCE.DAT

NOTE

The LM_LICENSE_FILE must be set exactly as shown, with a comma and semicolon(,;) between the two paths if Workview Office 7.31 or older is used. This is because Viewlogic and Xilinx use different versions of Flex/LM licensing which use different delimiters in this variable. The comma is not required for Workview Office 7.4 or newer.

For Windows NT 4.0 users only, select the following.

Start Settings Control Panel

Double click on the System icon and select the Environment tab. Verify the settings previously shown are listed in either the System Variables section or the User Variables section. They do not appear exactly as shown in the previous example; the variable is shown under the Variable header and the path is shown under the Value header. The word “set” does not appear.

For Windows 95 users only, run SYSEDIT to open the AUTOEXEC.BAT file, and verify the environment settings are as previously shown.

Viewlogic Interface Design Flow

The following figure shows the Viewlogic interface design flow.

Figure E.1 Viewlogic/Xilinx Software Design Flow

Steps in the Design Flow

The Viewlogic Design Flow includes the following steps.

The design flow starts with ViewDraw using the Xilinx Unified Library components and (optionally) LogiBLOX components.
When the schematics are saved, WIR files are created. EDIFNETO translates these WIR files to EDIF 2 0 0 format to be passed to the Xilinx M1 implementation tools for implementation.

NOTE
The option Xilinx must be entered as the level name for EDIFNETO.
A ViewSim netlist file (.VSM) must be created for simulation. This file is created from WIR files that have come directly from the Viewlogic design entry tools, or from the Xilinx Alliance Series Design Implementation Tools via EDIFNETI. Only an EDIF file from the placed and routed design provides full timing information for your design.
The ViewSim netlist file is then loaded into the Viewlogic simulator for simulation.
Digital Fusion, the Viewlogic simulation tool with VHDL simulation capabilities, is required only for functional simulation of designs containing LogiBLOX components with VHDL models; ViewSim, Viewlogic's gate-level simulator, will accept VSM files for any other Xilinx simulations.

Setting Up Project Libraries

This section describes project library setup for the workstation and the PC.

Workstation

The first step before creating or modifying a design in ViewDraw is to set up the project libraries. When creating a Viewlogic design to be processed by the Xilinx Alliance Series Design Implementation Tools, the Unified Libraries must be used. These libraries must be defined in the viewdraw.ini file located in the project's working directory.

To define a library in the viewdraw.ini, it must be added to the search order at the end of the viewdraw.ini file.

The Xilinx Libraries for use with Viewlogic schematic entry tools are located in $XILINX/viewlog/data. Directories exist for all the supported Xilinx families as well as LogiBLOX and the required Simprims, Builtin, and Xbuiltin libraries.

The following example is a library search order needed to create an XC4000EX design.

dir [p] . (primary)

dir [rm] /tools/xilinx/viewlog/data/xc4000x (xc4000x)

dir [r] /tools/xilinx/viewlog/data/logiblox (logiblox)

dir [rm] /tools/xilinx/viewlog/data/simprims (simprims)

dir [rm] /tools/xilinx/viewlog/data/builtin (builtin)

dir [rm] /tools/xilinx/viewlog/data/xbuiltin (xbuiltin)

NOTE

The XC4000X library and alias were new with the 1.4 version of the Xilinx software. This library is used for all XC4000EX/XL/XV designs. To use the 1.4 libraries with designs created with previous versions of the software, add the following line to the viewdraw.ini file before the LogiBLOX line.

dir [rm] /tools/xilinx/viewlog/data/xc4000x (xc4000ex)

Features of this search order.

The LogiBLOX library replaces X-BLOX. This library is read-only and not in megafile format.
There is a new library, “Simprims,” that is used only for simulation.
Order counts; user and family libraries must appear before Simprims, Builtin, and Xbuiltin.
Full paths must be used; do not use $XILINX to abbreviate the path.

Xilinx Commands in ViewDraw

Once the environment variables have been set and the libraries have been defined, you may begin your schematic design work. The one Xilinx feature within ViewDraw is the addition of two new commands under the pull-down menus.

Add LogiBLOX is used to create a new LogiBLOX component.
Change LogiBLOX is used to modify an existing LogiBLOX component.

PC

The first step before creating or modifying a design in ViewDraw is to set up the project libraries. When creating a Viewlogic design to be processed by the M1 Alliance Series Design Implementation Tools, the M1 Libraries must be used. These libraries must be defined in the Viewlogic project file (VPJ).

NOTE

Use the Workview Office Project Manager to make any modifications to the project libraries. Do not directly modify the viewdraw.ini file.

The Xilinx Libraries for use with Viewlogic schematic entry tools are located in C:\XILINX\VIEWLOG\DATA. Directories exist for all the supported Xilinx families as well as LogiBLOX and the required Simprims, Builtin, and Xbuiltin libraries.

The following is the library search order needed to create an XC4000EX design.

dir [p] . (primary)

dir [rm] C:\xilinx\viewlog\data\xc4000x (xc4000x)

dir [r] C:\xilinx\viewlog\data\logiblox (logiblox)

dir [rm] C:\xilinx\viewlog\data\simprims (simprims)

dir [rm] C:\xilinx\viewlog\data\builtin (builtin)

dir [rm] C:\xilinx\viewlog\data\xbuiltin (xbuiltin)

For information about how to use the Workview Office Project Manager to define the project libraries, refer to the Viewlogic Interface/Tutorial Guide.

NOTE

dir [rm] C:\xilinx\viewlog\data\xc4000x (xc4000ex)

Features of this search order.

The LogiBLOX library replaces X-BLOX. This library is read-only and not in megafile format.
There is a new library, “Simprims”, that is used only for simulation.
Order counts; user and family libraries must appear before Simprims, Builtin, and Xbuiltin.
Full paths must be used; do not use %XILINX% to abbreviate the path.

Initializing Xilinx Commands in ViewDraw

After the environment variables are set and the libraries are defined, you can start your schematic design. In the Viewlogic interface, there are five new commands in the Tools menu. You must initialize these commands in MS-DOS as shown in the following table.

To initialize the two LogiBLOX commands, enter the following.

custmenu xilinx-path\viewlog\data\viewblox.txt

To initialize the three Xilinx flow commands, enter the appropriate command for your version of Windows.

For Windows 95, enter the following command.

custmenu xilinx-path\viewlog\data\xvdraw95.txt

Windows NT, enter the following command.

custmenu xilinx-path\viewlog\data\xvdrawnt.txt

You should see the following five commands in the ViewDraw Tools menu.

Table E_1 Xilinx ViewDraw Commands

Command	Function
Add LogiBLOX	Use to create LogiBLOX components
Change LogiBLOX	Use to modify an existing LogiBLOX component
Write Xilinx EDIF	Use to create the EDIF netlist to pass to the Design Manager
Xilinx Functional Simulation	Use to prepare a design with uncompiled elements for a functional simulation
Read Xilinx Timing EDIF	Use to transfer the annotated EDIF to Workview Office for a timing simulation

NOTE

See the Viewlogic Interface/Tutorial Guide for more information on these commands. Also, refer to the “Using LogiBLOX with CAE Interfaces” appendix for more information on LogiBLOX.

Assigning a Pin Location

To assign the location of a pin to a specific pad location, simply add a location constraint attribute to that pad on the schematic.

Select the IPAD, OPAD or IOPAD you wish to constrain.
For workstation users, select Change Attr Dialog All. The Change Attributes dialog box will display.

For PC users, double click on the pad.
Enter LOC in the Name field, and enter the pin instance in the Component Value field.

Valid pin syntax for quad flat packages is P#, where # is the actual device pin number desired. For example: LOC = P11.

Valid pin syntax for grid array packages is RC, where R is the actual row and C is the column of the device pin. For example: LOC = A13.
Click on OK. The LOC attribute will now be placed next to the pad.

Bus-wide pads (that is IPAD16) must be constrained within a user constraints file (.ucf).

Timing Constraints

Timing constraints may be placed via the TIMESPEC symbol in the design. The TIMESPEC symbol is found in the Xilinx family library (for example., XC4000X). After placing this symbol on the top level of your design, the timespecs are added as properties of this symbol. The Timespec label (the label that begins with “TS”) is entered in the Name field, while the timing specification (e.g., “FROM:FFS:TO:FFS=30ns”) is entered in the Value field.

For more information on this subject, refer to the Viewlogic Interface/Tutorial Guide. For more information on timing constraints, see the Development System Reference Guide.