Specifying tSU
You can specify the tSU (setup-to-clock) for all inputs in your design
relative to a global clock or product term clock. Each tSU OFFSET timespec involves an
input path and a clock path. Input paths start at input pads, propagate
through input buffers and any number of combinatorial logic levels before ending at a
flip-flop D/T input, including the receiving flip-flop’s tSU. Input paths are not traced through flip-flop clock pins, asynchronous
set/reset inputs or bidirectional I/O pins. Global clock paths start at global
clock pads, propagate through global clock buffers and end at the flip-flop
clock pin. Product term clock paths start at input pads, propagate through a
single level of logic implemented in a clock product term and end at the flip-flop
clock pin.
If you are entering constraints in a UCF file, you can specify tSU directly
with the OFFSET timespec. OFFSET allows you to specify the timing relationship of
an external global clock and its associated data-in pads.
The format of the tSU OFFSET timespec is:
NET data_input_pad OFFSET=IN:setup_time:BEFORE:clock_input;
The following UCF timing constraint specifies the tSU of input A to Clock to
be no more than 5 ns:
NET A OFFSET=IN:5:BEFORE:CLOCK;
Note: To use the OFFSET command, the named clock input must be explicitly defined
as a global clock input using the BUFG attribute or symbol. (See Using Global Nets.)
See Also
Indirectly Specifying tSU
Speeding Up tSU with Local Feedback