Chapter 4

Using the Software

This chapter provides an overview of the Xilinx Development System. The standard flow from netlist to PROM file is described, including information on options, reports, simulation netlists, constraints, floorplanning, and guided implementations. Advanced flows, such as re-entrant routing and multi-pass place and route, are also described. This chapter includes the following sections.

• “Using the Xilinx Tools”
  
  
• “Xilinx Design Flow”
  
  
• “Selecting Options”
  
  
• “Using Design Constraints”
  
  
• “Guiding a Design with Floorplanner Files”
  
  
• “Static Timing Analysis”
  
  
• “Creating Simulation Files”
  
  
• “Downloading a Design”
  
  
• “Multi-Pass Place and Route”
  
  
• “Guiding an Implementation”