Cadence Interface/Tutorial Guide

Preface

About This Manual

This manual explains how to use the Xilinx/Cadence Interface software with Cadence Concept and Verilog-XL.

Before using this manual, you should be familiar with the operations that are common to all Xilinx's software tools: how to bring up the system, select a tool for use, specify operations, and manage design data. These topics are covered in the Development System Reference Guide.

Other publications you can consult for related information are the Cadence manuals, Concept Schematic User Guide and Xilinx FPGA Designer (Concept) User Guide.

Manual Contents

This manual covers the following topics.

• Chapter 1, “Introduction,” describes the Xilinx/Cadence design flow, Xilinx-supplied libraries, Xilinx architecture support, and major features.
  
  
• Chapter 2, “Getting Started,” explains how to set up Xilinx and Cadence files and environment variables.
  
  
• Chapter 3, “Design Entry,” describes Cadence design entry in relation to the Xilinx software.
  
  
• Chapter 4, “Functional Simulation,” explains how to perform functional simulation of your designs using Cadence's Verilog-XL simulator.
  
  
• Chapter 5, “Design Implementation,” explains how to use CONCEPT2XIL to translate your design into an EDIF file.
  
  
• Chapter 6, “Timing Simulation,” describes how to prepare for timing simulation using the NGD2VER command. The chapter then explains how to conduct timing simulation using the Cadence Verilog-XL software.
  
  
• Chapter 7, “Design and Simulation Techniques,” describes various design and simulation techniques.
  
  
• Chapter 8, “Manual Translation,” summarizes how to do design implementation, functional simulation, and timing simulation from the UNIX command line.
  
  
• Chapter 9, “Schematic Design Tutorial,” provides a detailed set of instructions allowing you to finish the Calc design.
  
  
• Appendix A, “Glossary,” describes the basic terminology for the Xilinx/Cadence interface.
  
  
• Appendix B, “Program Options,” describes Xilinx and Cadence command line programs that pertain to the Xilinx/Cadence interface.
  
  
• Appendix C, “Processing Designs with LogiBLOX Components,” explains how to translate LogiBLOX modules for use within the Cadence Concept editor.
  
  
• Appendix D, “Synopsys/Verilog Design Flow,” provides a flow chart that illustrates how to process designs described in Verilog HDL using Synopsys and simulate them with the Cadence Verilog-XL simulator.
  
  
• Appendix E, “Files,” contains annotated testbench templates.
  
  
• Appendix F, “XILINX.PFF Property Filter File Format,” describes the structure of the xilinx.pff file.
  
  

Conventions

Typographical

This manual uses the following conventions. An example illustrates each convention.

• Courier font indicates messages, prompts, and program files that the system displays.
  
  speed grade: -100
  
  
• Courier bold indicates literal commands that you enter in a syntactical statement.
  
  rpt_del_net=
  
  Courier bold also indicates commands that you select from a menu.
  
  File Open
  
  
• Italic font denotes the following items.
  
  
  • Variables in a syntax statement for which you must supply values
    
    edif2ngd design_name
    
    
  • References to other manuals
    
    See the Development System Reference Guide for more information.
    
    
  • Emphasis in text
    
    If a wire is drawn so that it overlaps the pin of a symbol, the two nets are not connected.
    
    
• Square brackets “[ ]” indicate an optional entry or parameter. However, in bus specifications, such as bus [7:0], they are required.
  
  edif2ngd [option_name] design_name
  
  Square brackets also enclose footnotes in tables that are printed out as hardcopy in DynaText^®.
  
  
• Braces “{ }” enclose a list of items from which you choose one or more.
  
  lowpwr ={on|off}
  
  
• A vertical bar “|” separates items in a list of choices.
  
  symbol editor_name [bus|pins]
  
  
• A vertical ellipsis indicates repetitive material that has been omitted.
  
  IOB #1: Name = QOUT'
  IOB #2: Name = CLKIN'
  .
  .
  .
  
  
• A horizontal ellipsis “. . .” indicates that an item can be repeated one or more times.
  
  allow block block_name loc1 loc2 ... locn;
  
  

Online Document

Xilinx has created several conventions for use within the DynaText online documents.

• Red-underlined text indicates an interbook link, which is a cross-reference to another book. Click on the red-underlined text to open the specified cross-reference.
  
  
• Blue-underlined text indicates an intrabook link, which is a cross-reference within a book. Click on the blue-underlined text to open the specified cross-reference.
  
  
• There are several types of icons.
  
  Iconized figures are identified by the figure icon.
  
  
  
  Iconized tables are identified by the table icon.
  
  
  
  The Copyright icon displays in the upper left corner on the first page of every Xilinx online document.
  
  
  
  The DynaText footnote icon displays next to the footnoted text.
  
  
  
  Double-click on these icons to display figures, tables, copyright information, or footnotes in a separate window.
  
  
• Inline figures display within the text of a document. You can display these figures in a separate window by clicking on the figure.